Electrically erasable and programmable read only memory (EEPROM) techniques also implement non-volatile memory on integrated circuits. EEPROMs can be electrically programmed, erased, and reprogrammed. EEPROM devices are useful as non-volatile memory units in computers and other systems. EEPROM circuits can also be used in chips whose primary function is not just memory, but includes other logical or computation functions. One technique of implementing an EEPROM is by use of a floating gate tunneling oxide (FLOTOX) transistor. To create a FLOTOX transistor, a field-effect transistor (FET) having source, drain, substrate, and gate terminals is modified to electrically isolate (float) the gate. This polycrystalline silicon ("polysilicon" or "poly") floating gate is created over a thin insulating layer of silicon dioxide (tunnel oxide). A second polysilicon gate (control gate) is created above the floating gate. The floating gate and control gate are separated by an interpoly insulating layer. Since the floating gate is electrically isolated, any charge stored on the floating gate is trapped. Storing sufficient charge on the floating gate will create an inversion channel between source and drain of the FET. Thus, the presence or absence of charge on the floating gate can represent two distinct data values.
FLOTOX transistors are selectively programmed by transferring electronic charges through the thin gate oxide onto the floating gate by Fowler-Nordheim tunneling. With the substrate voltage held at ground, the control gate is raised to a sufficiently high positive voltage so that electrons are transferred from the substrate to the floating gate by tunneling through the insulating thin gate oxide. The tunneling process is reversible. The floating gate can be erased by grounding the control gate and raising the drain voltage to a sufficiently high positive voltage to transfer electrons out of the floating gate to the drain terminal of the transistor by tunneling through the insulating gate oxide. The voltage applied to the control gate during programming is higher than the voltage applied to the drain during erasure because, while the erasure voltage is applied directly across the gate oxide, the programming voltage is applied to the control gate and capacitively coupled onto the floating gate.
The transistors can be selectively reprogrammed in the same manner as described above, since the tunneling process is nondestructive. The programming and erasure voltages which effect Fowler-Nordheim tunneling are higher than the voltages normally used in reading the memory. The Fowler-Nordheim tunneling effect is negligible at the lower voltages used in reading the memory, allowing a FLOTOX transistor to maintain its programmed state for years if subjected only to normal read cycles.
Since reprogrammable non-volatile memory is useful for DRAM die identification and reconfiguring and remapping defective DRAM memory cells, it is desired to implement EEPROM through floating gate transistor structures which are compatible with existing DRAM processing steps.
U.S. Pat. No. 5,723,375 assigned to the assignee of the present invention (and incorporated herein by reference) describes a floating-gate memory cell that can be used in a DRAM or EEPROM.
Other convention fabrication techniques yield circuits having relatively large EEPROM memory cell areas. What is needed is a circuit which has an EEPROM memory cell area having a reduced area, and a method for producing such a circuit. What is also needed is a circuit having two or more different gate-oxide thicknesses, and a method for producing such a circuit.